Simulation and comparison of trapezoidal triangle carrier signal with different reference signal for 1500 V DC bus 3 level ANPC inverter

Abstract

High voltage application to generate staircase output to reduce the total harmonic distortion (THD), the multilevel topologies gaining more and more attractions, and new topologies have been developed. This paper discuss about the advantage of active neutral point clamp (ANPC) topology over neutral point clamp (NPC), flying capacitor neutral point clamp (FCNPC) and T-type neutral point clamp (TNPC) topologies are discussed when it used for DC bus voltage of 1500 V. For ANPC topology several PWM techniques are used to calculate the total harmonic distortion, including phase opposition pulse width modulation (PODPWM), phase disposition pulse width modulation (PDPWM), and alternative phase opposition disposition pulse width modulation (APODPWM), phase shifted pulse width modulation (PSPWM), bus clamping PWM (BCPWM), trapezoidal triangle PWM (TRPWM), third harmonic injected PWM (THIPWM), and sinusoidal PWM (SPWM), three-phase sinusoidal signals with a 13th harmonic signal (THISDPWM). Also, the parasitic inductance model of ANPC topology is discussed. To use 1200 V switching device the most efficient PWM technique for a 1500 V DC bus, 3 phase 3 level ANPC inverter is determined by comparing the RMS value of phase voltage, THD, and peak voltage across the switching device. PSIM has been used to simulate a 3 level inverter using various PWM techniques.